/*
 * Copyright (c) 2025 Li Auto Inc. and its affiliates
 * Licensed under the Apache License, Version 2.0(the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/**
 * Eth Driver Configuration File
 */
#ifndef ETH_GETHMAC_CFG_H
#define ETH_GETHMAC_CFG_H

#include "Eth_GEthMac.h"
#include "IfxGeth_regdef.h"
#include "IfxGeth_Eth.h"
#include "Ifx_Cfg.h"
#include "_PinMap/IfxGeth_PinMap.h"
#include "Eth_GeneralTypes.h"
#include "IfxGeth_Phy_Rtl8211f.h"

/* Pins for RTL8211F RMII connection */
#define ETH_GREFCLK_PIN             IfxGeth_GREFCLK_P11_5_IN
#define ETH_RXCTL_PIN               IfxGeth_RXCTLA_P11_11_IN
#define ETH_RXCLK_PIN               IfxGeth_RXCLKA_P11_12_IN
#define ETH_RXD0_PIN                IfxGeth_RXD0A_P11_10_IN
#define ETH_RXD1_PIN                IfxGeth_RXD1A_P11_9_IN
#define ETH_RXD2_PIN                IfxGeth_RXD2A_P11_8_IN
#define ETH_RXD3_PIN                IfxGeth_RXD3A_P11_7_IN
#define ETH_MDC_PIN                 IfxGeth_MDC_P12_0_OUT
#define ETH_MDIO_PIN                IfxGeth_MDIO_P12_1_INOUT
#define ETH_TXD0_PIN                IfxGeth_TXD0_P11_3_OUT
#define ETH_TXD1_PIN                IfxGeth_TXD1_P11_2_OUT
#define ETH_TXD2_PIN                IfxGeth_TXD2_P11_1_OUT
#define ETH_TXD3_PIN                IfxGeth_TXD3_P11_0_OUT
#define ETH_TXCTL_PIN               IfxGeth_TXCTL_P11_6_OUT
#define ETH_TXCLK_PIN               IfxGeth_TXCLK_P11_4_OUT


/* MAC core configuration */
#ifdef CONFIG_NODE_MAC_ADDRESS
#define ETH_MAC_ADDRESS             (CONFIG_NODE_MAC_ADDRESS)
#else
#define ETH_MAC_ADDRESS             (0x123456789ABCu)
#endif

#define ETH_DUPLEX_MODE             (IfxGeth_DuplexMode_fullDuplex)
#define ETH_LINK_SPEED              (IfxGeth_LineSpeed_1000Mbps)
#define ETH_LOOP_BACK_MODE          (IfxGeth_LoopbackMode_disable)

/* MTL configuration */
#define ETH_NUM_TX_QUEUES           (1U)
#define ETH_NUM_RX_QUEUES           (1U)
#define ETH_MAX_TX_BUFFER_SIZE      (2560U)
#define ETH_TX_QUEUE_SIZE           (IfxGeth_QueueSize_2560Bytes)
#define ETH_MAX_RX_BUFFER_SIZE      (2560U)
#define ETH_RX_QUEUE_SIZE           (IfxGeth_QueueSize_2560Bytes)
#define IFXGETH_DESCRIPTOR_SIZE     (2u)
#define IFXGETH_MAX_TX_BUFFER_SIZE  (ETH_MAX_TX_BUFFER_SIZE + IFXGETH_HEADER_LENGTH + IFXGETH_DESCRIPTOR_SIZE)
#define IFXGETH_MAX_RX_BUFFER_SIZE  (ETH_MAX_RX_BUFFER_SIZE + IFXGETH_HEADER_LENGTH + IFXGETH_DESCRIPTOR_SIZE)

/* DMA configuration */
#define ETH_NUM_TX_CHANNELS         (1U)
#define ETH_NUM_RX_CHANNELS         (1U)
#define ETH_TX_DMA_CHANNEL_MAP      (IfxGeth_TxDmaChannel_0)
#define ETH_RX_DMA_CHANNEL_MAP      (IfxGeth_RxDmaChannel_0)
#define ETH_DMA_CHANNEL_ID          (IfxGeth_DmaChannel_0)

#define CPU_WHICH_SERVICE_ETHERNET  (0u)

/* phy init function pointer type */
typedef void (*geth_eth_phy_init)(void);
extern geth_eth_phy_init phy_init_func_ptr;

extern const IfxGeth_Eth_RgmiiPins gethmac_pins;
extern volatile eth_tx_buffer_crtl_type channel0_tx_buffer_crtl[IFXGETH_MAX_TX_DESCRIPTORS];
extern uint8 channel0_tx_buffer[IFXGETH_MAX_TX_DESCRIPTORS][IFXGETH_MAX_TX_BUFFER_SIZE];
extern uint8 channel0_rx_buffer[IFXGETH_MAX_RX_DESCRIPTORS][IFXGETH_MAX_RX_BUFFER_SIZE];

#endif
